CS代写 CS203 – cscodehelp代写
I/O & Basics of File Systems
Recap: von Neumman Architecture
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By loading diff your computer c
p ms into memory, ifferent functions
Instructions Data
Instructions Data
Operating Systems — Virtualization, Concurrency, Persistency
System call
Thread Virtual Memory
Memory Memory
Memory Memory
Memory Memory
Operating System
Recap: abstractions in operating systems
Process — the abstraction of a von Neumann machine
Virtual memory — the abstraction of memory
Thread — the abstraction of a processor
• Threadscansharevirtualmemoryiftheycomefromthesame
You don’t have to create another page table when creating a thread
Mechanisms of maintaining the abstraction
• Segmentation
• Demandingpage+Swapping
• Hierarchical page table to save space overhead in mapping
• TLB (translation look-aside buffer) to reduce the translation latency — CS203
Policies to decide how big the space in the physical main memory each process can enjoy
Working set/page local replacement — VMS/UNIX/ page replacement — Babaoglu’s UNIX
Policies to decide what page to stay in the physical main memory • FIFO+freelist—VMS/UNIX/Mach
• Clock+freelist—Babaoglu’sUNIX
• WS-Clock—AfterCarrandHennessy
Recap: Virtual memory
How our systems interact with I/O The basics of storage devices File
The computer is now like a small network
GPU Accelerator
NVMe SSD SATA SSD
processor-memory bus
Physical main memory is not directly linking to the system interconnect
FPGA/ASIC Wireless NIC
Registers What’s in each device?
• Command:receivingcommandsfromhost • Status:tellthehostthestatusofthedevice • Data:thelocationofexchangingdata
Microcontroller Memory ASICs
Microcontroller
ASIC (e.g. NAND)
Controller + Registers
How your application interact with peripherals
Applications
I/O libraries Buffer
Applications with Direct I/O
How do I know if the device has something for me? Or … How the device know if I have something for it?
Kernel Hardware
Device Driver
Device Controller
Device Driver
Device Controller
Device#2 10
Device Driver
Device Controller
Device#3 Device#4
Polling v.s. Interrupt — Round 1
Comparing polling and interrupt, how many of the following statements are
! PollingmechanismitselfgenerallyconsumemoreCPUtimethaninterrupt
” InterruptcanimproveCPUutilizationifthedeviceonlyneedsservicefromthe processor occasionally
# InterruptallowsasynchronousI/Oinprograms
$ Thenumberofinstructionsofhandlinganeventafterpollingishigherthan handling the same event after receiving an interrupt
https://www.pollev.com/hungweitseng close in
Polling v.s. Interrupt — Round 1
Comparing polling and interrupt, how many of the following statements are ! PollingmechanismitselfgenerallyconsumemoreCPUtimethaninterrupt
You need to have a loop that periodically polls
” InterruptcanimproveCPUutilizationifthedeviceonlyneedsservicefromthe processor occasionally You can context switch!
# InterruptallowsasynchronousI/Oinprograms
$ Thenumberofinstructionsofhandlinganeventafterpollingishigherthan
handling the same event after receiving an interrupt
Not related to polling/interrupt
Your function can return immediately
The device signals the processor only when
the device requires the processor/OS
handle some tasks/data
System Interconnect
Registers Microcontroller ASICs Memory
System Memory
The processor only signals the device when
The processor/OS constantly asks if the device (e.g. examine the status register of the device) is ready to or requires the processor/OS handle some tasks/data
System Memory
The OS/processor executes corresponding handler if the device can handle demand tasks/data or has tasks/data ready
System Interconnect
Microcontroller
Interrupt v.s. Polling — Round 2
Regarding using interrupts and polling for communicating peripheral devices, how
many of the followings is/are correct?
! Usinginterruptsmayincreasetheend-to-endlatencyforaprocesscomparingwith polling
” Usinginterruptsmayincreasethecachemissratescomparingwithpolling
# Usinginterruptsforhigh-speedstoragedevicesmaydecreasethepowerconsumptionof the processor
$ ThelatencyofservingI/Orequestsusinginterruptscanbelongerthanusingpollingif context switches occur during the I/O
https://www.pollev.com/hungweitseng close in
Recap: What happens during context switch
Load architectural states from process control block (somewhere in the main memory,
potentially a cache miss, TLB miss) — takes several microseconds if everything is in the
physical memory
Set processor registers according to the loaded architectural states
• SettheCR3(pagetablebaseregisterinx86)registertoidentifytherootpagetable
node in the hierarchical page table
Set the RIP (program counter in x86) to the previous execution
Restore virtual memory address
• Youmustloadtherootpagetablenodetothemainmemoryatleast.
• TLBflush
• Invalidate all entries in the TLB
• Most TLBs are not tagged, so you’ve to do this
You DO NOT have to load every page content back from disk — remember that we 22
have demand paging!
To switch or not to switch that’s the question.
system call
Context Switch P1->P2
Context Switch P2->P1
Accessing Device
device received the command
IfTI/ODevice +T
Context switch P1->P2 Context switch P2->P1
