程序代写代做代考 compiler assembly mips x86 PowerPoint 演示文稿

PowerPoint 演示文稿

CO101
Principle of Computer

Organization
Lecture 05: Instruction Set

Architecture 1

Liang Yanyan

澳門科技大學
Macau of University of Science and Technology

Review: The Instruction Set Architecture (ISA)

software hardware

instruction set

The interface description separating
the software and hardware

Review: Execution Cycle

Instruction
Fetch

Instruction
Decode

Operand
Fetch

Execute

Result
Store

Determine Next
Instruction

Obtain instruction from program storage

Determine required actions and instruction size

Locate and obtain operand data

Compute result value or status

Deposit results in storage for later use

Determine successor instruction

ISA: What must be specified?

Instruction
Fetch

Instruction
Decode

Operand
Fetch

Execute

Result
Store

Determine Next
Instruction

• Where are instructions stored?
• Instruction Format or Encoding

• how is it encoded?
• Location of operands and result

• where other than memory?
• how are memory operands located?

• Data type and Size
• Operations

• what operations are supported?
• How to determine successor instruction?

• normal instruction, jumps, branches

Review: Processor Organization
• Fetch & Execute Cycle

• Instructions are fetched from memory
one by one.
• Bits in the instruction “control” the
subsequent actions.
• Fetch the “next” instruction and continue.

PC Memory

PC is a special register called
Program Counter. It stores the
memory address of current
instruction being executed.
Processor fetch instruction
addressed by PC to execute.

Review: Processor Organization
• Control needs to have circuitry to

• Decide which is the next instruction and input it from memory.
• Decode the instruction.
• Issue signals that control the way information flows between

datapath components.
• Control what operations the datapath’s functional units perform.

• Datapath needs to have circuitry to
• Execute instructions – functional units (e.g., adder) and storage

locations (e.g., register file).
• Interconnect the functional units so that the instructions can be

executed as required.
• Load data from and store data to memory.

Stored Program Concept
• Today’s computers are built on two key principles:

• Instructions are represented as numbers.
• Programs are stored in memory to be read or written, just like

numbers.

• These principles lead to the stored-program concept; its
invention let the computing genie out of its bottle. (BTW,
“let genie out of its bottle” is a famous idiom)

• Stored-program concept
• Programs can be shipped as files of binary numbers – binary

compatibility.
• Computers can inherit ready-made software provided they are

compatible with an existing ISA—leads industry to align around a
small number of ISA.

Two Key Principles of Machine Design
• Machine instructions are bits.

• Instructions are represented as numbers
and, as such, are indistinguishable from
data.

• Programs are stored in memory to
be read or written just like data.

• Memory can contain the source code
for an editor program, the
corresponding compiled machine
code, the text that the compiled
program is using, and even the
compiler that generated the machine
code. (All above are stored as bits) .

Assembly Language
• Language of the machine.
• Instructions in assembly language are more primitive than

instructions in higher level languages.
• each instruction controls the machine to finish one operation.
• robot example: forward, backward, etc.
• computer example: add, subtract, multiply, divide, etc.

• Very restrictive.
• e.g., MIPS Arithmetic Instructions.

• This course focuses on MIPS assembly language.
• Similar to other ISAs developed since the 1980’s.
• Used by Broadcom, Cisco, NEC, Nintendo, Sony, …

Assembly Language Instructions
• The language of the machine

• Want an ISA that makes it easy to build the hardware and the
compiler while maximizing performance and minimizing cost.

Design goals: maximize performance, minimize cost,
reduce design time (time–to–market), minimize memory
space (embedded systems), minimize power
consumption (mobile systems)

RISC — Reduced Instruction Set Computer
• RISC philosophy

• fixed instruction lengths
• load–store instruction sets
• limited number of addressing modes
• limited number of operations

• MIPS, Sun SPARC, HP PA–RISC, IBM PowerPC …
• Instruction sets are measured by how well compilers use

them as opposed to how well assembly language
programmers use them.

• CISC (C for complex), e.g., Intel x86

MIPS (RISC) Design Principles
• Simplicity favors regularity

• fixed size instructions
• small number of instruction formats
• opcode always the first 6 bits

• Smaller is faster
• limited instruction set
• limited number of registers in register file
• limited number of addressing modes

• Make the common case fast
• arithmetic operands from the register file (load–store machine)
• allow instructions to contain immediate operands

• Good design demands good compromises
• three instruction formats

RISC vs CISC
• RISC (Reduced instruction set computer)

• e.g. MIPS, ARM, SPARC by Sun Microsystems
• provide simplified instructions
• goal is to reduce the execution time of each instruction
• drawback is longer code size

• CISC (Complex instruction set computer)
• e.g. x86
• provide more powerful operations
• goal is to reduce number of instructions executed → reduce

code size
• makes assembly language easy
• danger is longer to execute one instruction

• Ease of compilation vs hardware complexity
• Complex hardware makes compilation easy, vice versa.

Generic Examples of Instruction Format Widths

Variable:

Fixed:

Hybrid:

…
…

Optimized for code size

Optimized for performance (speed)

Some processors provide optional
mode to execute subset of 16-bit
width instructions.

Arithmetic, Memory, Branch instructions
• Instruction Categories

• Computational
• Load/Store
• Jump and Branch
• Floating Point
• coprocessor
• Memory Management
• Special

• Divide MIPS instructions into 3 categories
• Machine formats:

• 3 formats, all 32 bits wide
• Very structured, rely on compiler to achieve performance

op rs rt rd shamt funct

op rs rt immediate

op jump target

R format

I format

J format

MIPS Instruction Classes Distribution
• Frequency of MIPS instruction classes for SPEC2006

MIPS Arithmetic Instructions
• MIPS assembly language arithmetic statement

• Each arithmetic instruction performs one operation
• Each specifies exactly three operands that are all

contained in the datapath’s register file ($t0,$s1,$s2)

• Instruction Format (R format)

add $t0, $s1, $s2
sub $t0, $s1, $s2

destination = source1 op source2

MIPS Logical Instructions
• There are a number of bit–wise logical operations in the

MIPS ISA
and $t0, $t1, $t2 #$t0 = $t1 & $t2

or $t0, $t1, $t2 #$t0 = $t1 | $t2

nor $t0, $t1, $t2 #$t0 = not($t1 | $t2)

• Instruction Format (R format)

MIPS Arithmetic Instructions
• Perform arithmetic calculations.

• All instructions have 3 operands which
must be registers.

• Operand order is fixed (destination first).
• There 32 general purpose registers in

CPU, each one has a name. E.g. s0,
s1, s2, etc.

• Each register can store a 32-bit
data/value.

• add $s0, $s1, $s2
• Meaning: add the value stored in register

s1 with the value stored in register s2, and
store the sum into register s0.

• E.g. if s1 stores a data 15, s2 stores a
data 8, then the sum 23 will be stored into
register s0 when this instruction is
executed.

• sub $s0, $s1, $s2 ??

t0
t1
t2
t3
t4
t5
t6

32 bits data

…
s0
s1
s2
s3
s4
s5
s6

32 bits data

…

CPU

Memory

(RAM)

MIPS Arithmetic Instructions
• Example:

C code: A = B + C

MIPS code: add $s0, $s1, $s2

(associated with variables by compiler)

• Of course this complicates some things… code size

C code: A = B + C + D;

MIPS code: add $t0, $s1, $s2
add $s0, $t0, $s3

Registers vs. Memory
• Why register?

• registers are faster than memory.
• using registers can reduce memory transfer.

Example:

a = b + c;
d = a + b;

If there is no registers, how many memory reads/writes?

• What about programs with many variables?

• Reuse registers.

MIPS Register File
• A small piece of memory inside the processor to store

values.
• Advantages of registers

• registers are faster than memory But register files with more
locations are slower (e.g., a 64 word file could be as much as
50% slower than a 32 word file).

• registers are easier for a compiler to use
• e.g., (A*B) – (C*D) – (E*F) can do multiplies in any order vs. stack

• Can hold variables so that
• memory traffic is reduced, so program is speed up (since registers

are faster than memory).
• code density improves (since register named with fewer bits than

memory location).

MIPS Register File
• Programmable storage

• 2^32 bytes of memory
• 31 x 32-bit General Purpose Registers (R0 = 0)
• 32 x 32-bit Floating Point Registers
• PC – program counter
• lo hi – multiplier output registers

0r0
r1
°
°
°
r31
PC
lo
hi

Aside: MIPS Register Convention

CO101�Principle of Computer Organization
Review: The Instruction Set Architecture (ISA)
Review: Execution Cycle
ISA: What must be specified?
Review: Processor Organization
Review: Processor Organization
Stored Program Concept
Two Key Principles of Machine Design
Assembly Language
Assembly Language Instructions
RISC — Reduced Instruction Set Computer
MIPS (RISC) Design Principles
RISC vs CISC
Generic Examples of Instruction Format Widths
Arithmetic, Memory, Branch instructions
MIPS Instruction Classes Distribution
MIPS Arithmetic Instructions
MIPS Logical Instructions
MIPS Arithmetic Instructions
MIPS Arithmetic Instructions
Registers vs. Memory
MIPS Register File
MIPS Register File
Aside: MIPS Register Convention

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