CS计算机代考程序代写 Family Name ……………………………….. Given Name ………………………………… Student No. …………………………………. Signature ……………………………………..

Family Name ……………………………….. Given Name ………………………………… Student No. …………………………………. Signature ……………………………………..
THE UNIVERSITY OF NEW SOUTH WALES
School of Electrical Engineering & Telecommunications
MID-SEMESTER EXAMINATION
Semester 2, 2017
ELEC1111
Electrical and Telecommunications Engineering
TIME ALLOWED: 1 hour TOTAL MARKS: 100 TOTAL NUMBER OF QUESTIONS: 4
THIS EXAM CONTRIBUTES 20% TO THE TOTAL COURSE ASSESSMENT
Reading Time: 5 minutes.
This paper contains 6 pages.
Candidates must ATTEMPT ALL questions.
Answer each question in a separate answer booklet.
Marks for each question are indicated beside the question.
This paper MAY NOT be retained by the candidate.
Print your name, student ID and question number on the front page of each answer book. Authorised examination materials:
Candidates should use their own UNSW-approved electronic calculators.
This is a closed book examination.
Assumptions made in answering the questions should be stated explicitly.
All answers must be written in ink. Except where they are expressly required, pencils may only be used for drawing, sketching or graphical work.
For the numerical solutions, you can use either fraction form or floating-point form (maximum 2 digits after decimal point is enough)
Page 1 of 6

QUESTION 1 [20 marks]
(i) For the circuit shown in Figure 1,
a. (15 marks) Calculate the equivalent resistance 𝑅eq as seen from terminals a-b. b. (5 marks) Find the current 𝑖 through the network using the result of part (a).
60 Ω 12 Ω
ia2.5Ω 6Ω
80 Ω
35 V Req
15 Ω
Figure 1
20 Ω
b
Page 2 of 6

QUESTION 2 [40 marks]
(i) [24 marks] For the circuit shown in Figure 2,
a. (10 marks) Apply nodal analysis to obtain the node voltage at nodes 𝑣1 and 𝑣2, andshowthat𝑣1 =20Vand𝑣2 =12V
b. (12 marks) Calculate all the powers absorbed/supplied by resistors and sources and specify which element supplies power and which element absorbs power.
c. (2 marks) Verify the law of conservation of energy for this circuit.
v1 i3 8Ω v2 i1
3 A 10 Ω
Figure 2
(ii) [16 marks] For the circuit shown in Figure 3,
3Ω i4
i2
6 Ω
15 V
a. (10 marks) Apply mesh analysis to obtain the mesh currents 𝑖1, 𝑖2 and 𝑖3, and showthat𝑖1 =25Aand𝑖2 =12.5A
b. (2 marks) Find the voltage 𝑣 across 4-Ω resistor.
c. (4 marks) Calculate the power of the 50-V voltage source and explain whether it
supplies or absorbs power.
12.5 A
i3 2Ω
i1 v4Ωi2
Figure 3
1Ω 100 V
50 V
8Ω
Page 3 of 6

QUESTION 3 [20 marks]
(i) [10 marks] For the circuit shown in Figure 4,
a. (6 marks) Use source transformation to obtain Thevenin equivalent circuit from terminals a-b and draw the Thevenin equivalent circuit.
b. (4 marks) Determine the value of load resistance 𝑅𝐿 for maximum power transfer, and then calculate the maximum power that can be delivered to 𝑅𝐿.
12 kΩ 2 kΩ 10 kΩ
120 V 24 kΩ 10 mA
Figure 4
a
b
RL
(ii) [10 marks] Find the equivalent resistance 𝑅eq in the circuit given in Figure 5.
10ix ix
5A 4Ω
Figure 5
2Ω
Req
a
b
Page 4 of 6

QUESTION 4 [20 marks]
(i) In the circuit shown in Figure 6, the switch has been closed for a long time before it
is opened at 𝑡 = 0. The voltage source is given a step function.
a. (4 marks) Find the initial voltage 𝑣(0−) across the capacitor under steady-state condition.
b. (2 marks) Calculate the initial energy 𝑤𝐶 (0) stored in the capacitor.
c. (4 marks) Find the final voltage 𝑣(∞) across the capacitor under steady-state
condition.
d. (4 marks) Derive an expression for the voltage of the capacitor 𝑣(𝑡) for all time
(i.e., for both 𝑡 < 0 and 𝑡 > 0).
e. (2 marks) Sketch the obtained voltage 𝑣(𝑡) in part (d) as a function of time.
f. (4 marks) Derive an expression for the current 𝑖(𝑡) through the 5-Ω resistor for
all time (i.e., for both 𝑡 < 0 and 𝑡 > 0).
i
5Ω
0.2 F v
Figure 6
END OF PAPER
t= 0
10 Ω
20 V
20u(t) V 0t
3 A
DO NOT answer this question. This is for peer-review assignment ONLY.
In the circuit shown below, the switch has been closed for a long time before it is opened at 𝑡 = 0.
a. Find the initial voltage 𝑣(0−) across the capacitor under steady-state condition.
b. Find the final voltage 𝑣(∞) across the capacitor under steady-state condition.
c. Derive an expression for the voltage of the capacitor 𝑣(𝑡) for all time (i.e., for
both 𝑡 < 0 and 𝑡 > 0).
d. Sketch the obtained voltage 𝑣(𝑡) in part (d) as a function of time.
80 V
40 Ω t = 0 30 Ω
ix
3 F v 0.5ix 50 Ω
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